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Xezim – a Rust-based SystemVerilog simulator

Xezim is a lightweight SystemVerilog simulator written in Rust, aimed at experimentation, learning, and AI-assisted chip design. It supports combinational and sequential simulation and multiple waveform dump formats.

SourceHacker News AIAuthor: bondanr
Xezim – a Rust-based SystemVerilog simulator
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Key points

  • Rust-based SystemVerilog simulator supporting IEEE 1800-2017
  • Waveform dumping (VCD, XTrace, AITRACE) included
  • Explores AI-assisted EDA tool development feasibility
  • Open-source (Apache 2.0) with a test suite

Highlights and analysis are generated automatically and may contain errors. Check the original source.