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SENTRY: Statistical Reliability Analysis of Vision Transformers Under Soft Errors

This paper proposes a statistical fault injection framework named SENTRY that leverages finite-population sampling theory to provide formal reliability guarantees for Vision Transformers. With only a few thousand samples, it bounds failure rate estimation within 1% error margin at 99% confidence, achieving up to 10,700x reduction in experimental cost. The study reveals a highly non-uniform reliability landscape: only 3% of FP32 bit-flips cause failure, but most of those lead to catastrophic accuracy collapse, with vulnerabilities localized to normalization layers and critical exponent bits in IEEE-754 format.

SourcearXiv Computer VisionAuthor: Pramit Kumar Bhaduri, Mahdi Taheri, Samira Nazari, Maksim Jenihhin, Christian Herglotz, Michael Hubner

[2606.07620] SENTRY: Statistical Reliability Analysis of Vision Transformers Under Soft Errors

[Submitted on 30 May 2026]

Title:SENTRY: Statistical Reliability Analysis of Vision Transformers Under Soft Errors

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Abstract:With the growth of Vision Transformers in safety-critical domains like autonomous systems and medical imaging, ensuring their reliability against soft errors is paramount. While ViTs offer state-of-the-art accuracy, their massive parameter counts render exhaustive fault injection campaigns infeasible. To bridge this gap, a statistical fault injection framework is presented, leveraging finite-population sampling theory to provide formal reliability guarantees. It is demonstrated that failure rates are bounded within a 1% margin at 99\% confidence using only a few thousand samples, regardless of model scale. This methodology achieves up to a 10,700 times reduction in experimental cost compared to exhaustive approaches, while preserving the ability to localize vulnerabilities across architectural components. Through extensive evaluation of different architectures like ViT-Tiny and ViT-Small, a highly non-uniform reliability landscape is uncovered. It is shown that while only 3% of FP32 bit-flips result in failure, the vast majority of these events lead to catastrophic accuracy collapse. Specific vulnerabilities are localized to normalization layers and critical exponent bits within the IEEE-754 format, providing a mathematical foundation and actionable insights for the design of hardened, edge-deployed ViT architectures.

Subjects:

Computer Vision and Pattern Recognition (cs.CV); Artificial Intelligence (cs.AI); Distributed, Parallel, and Cluster Computing (cs.DC); Machine Learning (cs.LG)

Cite as: arXiv:2606.07620 [cs.CV]

(or arXiv:2606.07620v1 [cs.CV] for this version)

https://doi.org/10.48550/arXiv.2606.07620

arXiv-issued DOI via DataCite

Submission history

From: Mahdi Taheri [view email] [v1] Sat, 30 May 2026 11:14:26 UTC (681 KB)

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