Accelerating GPU Inference of Large Language Models with Moderately Unstructured Sparse Weight Matrices
A new GPU inference method for LLMs with moderate sparsity (around 50%) is proposed, using a three-layer matrix storage format that enables sparse tensor cores and CUDA cores to jointly accelerate sparse matrix multiplication. It is the first to outperform dense matrix multiplication on modern HBM-equipped GPUs, achieving up to 1.64x kernel-level speedup over SpInfer and 1.41x end-to-end speedup over FlashLLM.
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[Submitted on 13 Jun 2026]
Title:Accelerating GPU Inference of Large Language Models with Moderately Unstructured Sparse Weight Matrices
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Abstract:With the growing deployment of large language models (LLMs), LLM inference cost has become a key challenge. Pruning techniques that introduce sparsity into weight matrices can accelerate inference. However, maintaining model quality typically limits pruning to moderate unstructured sparsity (around 50\%). At these sparsity levels, none of the existing GPU kernels for sparse matrix multiplication (SpMM) can outperform their dense counterparts. This paper proposes an efficient GPU inference method for LLMs with moderate sparsity. We propose a three-layer matrix storage format comprising: (i) a Sparse-TC layer enabling sparse tensor cores to accelerate SpMM; (ii) a Slot-Filling layer using parallel differential distance for matrix compression while supporting low-cost on-chip decoding; (iii) a lightweight Residual Layer ensuring correct SpMM computation. Building on this format, we design a SpMM kernel that jointly utilizes sparse tensor cores and CUDA cores. This design enables an efficient execution pipeline and overlaps on-chip computation with memory access. Evaluations show that our work is the first to outperform dense matrix multiplication on modern GPUs equipped with high-bandwidth memory (HBM). It achieves up to 1.64x kernel-level speedup over SpInfer (EuroSys'25, Best paper) and up to 1.41x end-to-end speedups over FlashLLM (VLDB'24). Our source code: this https URL.
Comments: DAC 2026
Subjects:
Machine Learning (cs.LG); Artificial Intelligence (cs.AI); Hardware Architecture (cs.AR)
Cite as: arXiv:2607.08786 [cs.LG]
(or arXiv:2607.08786v1 [cs.LG] for this version)
https://doi.org/10.48550/arXiv.2607.08786
arXiv-issued DOI via DataCite
Submission history
From: Tao Lu [view email] [v1] Sat, 13 Jun 2026 13:38:27 UTC (236 KB)
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